D.I.Y. Digital Synthesizer
    Sure, why not.

    This projects was partly inspired by the fact that it is now possible to get a field programmable gate array (FPGA) at a very reasonable price that is just loaded with logic components.

    For example, the Altera EP1K50 has 10 blocks of dual port ram that can be configured as 256 words x 16 bits.  And it has 2880 logic elements, which, according to my understanding, is basically equivalent to a D flip flop and a 5 input logic array.  Of course, they are really more flexible than that.  But what is amazing is that it is possible to put a 16 x 16 multiplier in one of these things and still have room to burn.  Many years ago I was going to build a discrete version of this thing (using LSI logic for the most part, dual port rams, multiplier chips, etc.), but never started it because of the fact that it would have to be built on a large wire wrap panel and I figured the likelihood of ever being able to debug it was unlikely.

What can it do?

    Well, I actually don't know the answer to that, because, I am still in the preliminary stages of the design.  I have other projects that I started a year ago that need to be completed first, but I am working on it a bit at a time.  But, here are the various subsystems that would be implemented on the chip.

    NCO - Numerical Control Oscillator.  Actually, this is a bank of oscillators.  A practical size for the bank is 256.  The nco would consist of a frequency ram, which would be 24 bits wide.  This is the ram that the controller would write data into to control the pitch of the oscillators.  This would be a dual port ram so that both the synth and the controller could access it at the same time.  The other ram is the phase accumulator.  This is also a dual port ram (to take care of pipeline delays in a transparent way).  The phase accumulator is also 256 x 24.  The phase accumulator would keep track of where in the cycle each sound is.  The phase accumulator is fed by an adder which adds the output of the phase accumulator to the frequency register.  The frequency resolution, at 96KHz sample rate would be about 0.006Hz.

    WAVEFORM LOOK UP TABLE - This is actually off chip.  The output of the phase accumulator register would be summed with the output of the phase modulation register.  This then goes off chip.  The waveform table is basically one complete cycle of a waveform.  This waveform can be anything, determined by the user.  I could be anything from a simple sine wave to something that was sampled from a real instrument.  The input to the waveform look up table is 24 bits (the user can choose to use less than this, 16 bits is probably more than enough).  The output of the waveform look up table is 16 bits.

    AMPLITUDE CONTROL - The output of the waveform look up table feeds a 16 x 16 multiplier which is used to control the amplitude and dynamics of the sound.  The other input for the multiplier comes from the envelope generator.  The output of the multiplier goes to the output accumulators and also to the phase modulation register.

    PHASE MODULATION REGISTER - This is a dual port 256 x 24 ram that is used to modulate the phase of the nco.  The selected register is added to the output of the nco before it is fed to the waveform lookup table.

    ENVELOPE GENERATOR - The envelope generator is very simple.  It is simply a means of generating linear ramps.  There is no limit on the number of segments other than what the controller (external to synth chip)  is programmed to implement.  There are three 256 x 16 bit registers.  There is a final value register, and an increment register.  These are dual port rams and this is where the external controller talks to the envelope generator.  The third register, the envelope register, is fed from the output of the increment register and the envelope register through a 16 bit added.  The output of the adder is also compared to the final value register and a flag is set when the value is met so that the main controller can change the values and start the next segment of the envelope.

    ALGORITHM RAM - This is probably one of the more important sub systems.  What this memory is used for is to store the sequence for processing the data, such as, where to store phase modulation data, etc.  It will be sort of like a microcode sequencer for the chip which will determine how the oscillators are combined to produce sound.

    OUTPUT ACCUMULATORS - There will be a pair of accumulators for "mixing" the outputs of the oscillators to produce the final sound.  The outputs of the phase accumulators will then be sent off chip to a stereo DAC.

     Block Diagram of Digital Synth (.pdf)